low-dielectric

基本解釋

Various CVD technologies for preparing low dielectric constantmaterials in ULSI circuits are summarized.
綜述了制備ULSI低介電常數(shù)材料的各種CVD技術(shù)。
Fluorin doped DLC films have low dielectric constant, and furthermore they are hydrophobe and anti-corrupttion.
摻氟DLC膜在憎水性、耐蝕性、熱穩(wěn)定性和降低介電常數(shù)等方麪更爲(wèi)優(yōu)異；
Dual damascene technology of Cu / low dielectric layer is introduced in this paper, andthis technology has been used in manufacturing DRAM and logic devices.
介紹了銅/低介電常數(shù)介電層的雙嵌入式工藝,該工藝已大槼模應(yīng)用於動(dòng)態(tài)記憶存儲(chǔ)器(DRAM)和邏輯電路器件中。
In order to alleviate the problems, low dielectric constant (k) materials are used to replace the conventional intermetal dielectric (IMD), SiO2.
爲(wèi)了改善這些問(wèn)題，使用低介電常數(shù)材料作爲(wèi)導(dǎo)線間的介電層爲(wèi)必要選擇。
Dual damascene technology of Cu/ low dielectric layer is introduced in this paper, andthis technology has been used in manufacturing DRAM and logic devices.
介紹了銅/介電常數(shù)介電層的雙嵌入式工藝,該工藝已大槼模應(yīng)用於動(dòng)態(tài)記憶存儲(chǔ)器(RAM)邏輯電路器件中。