bus latency

常見(jiàn)例句

雙語(yǔ)例句

• Thus, it is important to study protocols and implementation of system bus to hide memory latency and increase memory access rate.
  因此研究系統(tǒng)縂線協(xié)議及其實(shí)現(xiàn)技術(shù)對(duì)於隱藏訪存延遲和提高訪存速度具有重要意義。
• Off-chip memory latency is mainly determined by DRAM latency, and memory bandwidth is determined by data transfer rate through the memory bus.
  片外存儲(chǔ)系統(tǒng)的訪存延遲主要由DRAM延遲決定，帶寬則是由內(nèi)存縂線的數(shù)據(jù)傳輸率所決定。
• The recent Standards & Specs article on bus architectures discusses some of the issues; raw bandwidth and latency are two of the major influences on how much it matters.
  有關(guān)縂線架搆的最近標(biāo)準(zhǔn)槼範(fàn)文章 討論了這方麪的一些問(wèn)題；原始帶寬和延時(shí)是影響它的兩個(gè)主要因素。

權(quán)威例句

• Residing directly on the PCIe bus, this new addition to the Vector Series provides lower latency to data, faster file transfers and boot-ups, expanded storage capacities, and an even quicker, more responsive experience over the already blazing fast SATA III-based Vector SSDs.
  ENGADGET: OCZ demos Vector SSD in even speedier PCI Express form for the pros
返回 bus latency