dense logic

基本解釋

We present a dense timed interval temporal logic and exploit the decidability problem of DTITL.
定義了稠密時(shí)間區(qū)間時(shí)序邏輯，它是區(qū)間時(shí)序邏輯的一種實(shí)時(shí)擴(kuò)充。
However, since memory circuit is very large and dense and the growing of its size is amazing, it is unpractical to extract the logic parameter directly with simulation tools.
然而，由于存儲(chǔ)器單元密集和電路龐大的特點(diǎn)，并且存儲(chǔ)器的增大極為迅速，使得用模擬工具直接提取邏輯參數(shù)并不現(xiàn)實(shí)，存儲(chǔ)器的簡(jiǎn)化迫在眉睫。
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